Just some old photos 🙂
It uses FPGA firmware based on Openhpsdr project with modifications by EU1SW.
I started with AD9226 dual 12bit SDR receiver and ended with something like this:
![](https://enthru.net/wp-content/uploads/2023/05/telegram-cloud-photo-size-2-5390849298910006683-y.jpg)
It had Cyclone 4 FPGA with Hermes compatible network protocol, DAC904E as DAC and BFG591 as preamp.
![](https://enthru.net/wp-content/uploads/2023/05/telegram-cloud-photo-size-2-5390849298910006666-y.jpg)
And at the same time I was assembling pretty the same but with AD6645 ADC and FPGA in different package:
![](https://enthru.net/wp-content/uploads/2023/05/telegram-cloud-photo-size-2-5390849298910006686-y.jpg)
Also I built different module for ADC:
![](https://enthru.net/wp-content/uploads/2023/05/telegram-cloud-photo-size-2-5390849298910006662-y.jpg)
![](https://enthru.net/wp-content/uploads/2023/05/telegram-cloud-photo-size-2-5390849298910006663-y.jpg)
![](https://enthru.net/wp-content/uploads/2023/05/telegram-cloud-photo-size-2-5390849298910006664-y.jpg)
But as I’m not interested with 12bit ADC and it’s dead I plan to build only 14 bit transceiver or pair of them if BGA package FPGA still alive (i have some doubts).
So much electronic stuff died in my hands 😀 I hope some time I will able to do experiments without destroying anything 🙂